A new method of fabricating high aspect ratio nanostructures in silicon without the use of sub-micron lithographic technique is reported. The proposed method comprises two important steps including the use of CMOS spacer technique to form silicon nitride nanostructure masking followed by deep reactive ion etching (DRIE) of the silicon substrate to form the final silicon nanostructures. Silicon dioxide is used as the sacrificial layer to form the silicon nitride nanostructures. With DRIE a high etch selectivity of 50:1 between silicon and silicon nitride was achieved. The use of the spacer technique is particularly advantageous where self-aligned nanostructures with potentially unlimited lengths are formed without the need of submicron lithographic tools and resist materials. With this method, uniform arrays of 100 nm silicon nanostructures which are at least 4 μm tall with aspect ratio higher than 40 were successfully fabricated.
We report on a process for fabricating self-aligned tungsten (W) nanowires with polycrystalline silicon core. Tungsten nanowires as thin as 10 nm were formed by utilizing polysilicon sidewall transfer technology followed by selective deposition of tungsten by chemical vapor deposition (CVD) using WF6 as the precursor. With selective CVD, the process is self-limiting whereby the tungsten formation is confined to the polysilicon regions; hence, the nanowires are formed without the need for lithography or for additional processing. The fabricated tungsten nanowires were observed to be perfectly aligned, showing 100% selectivity to polysilicon and can be made to be electrically isolated from one another. The electrical conductivity of the nanowires was characterized to determine the effect of its physical dimensions. The conductivity for the tungsten nanowires were found to be 40% higher when compared to doped polysilicon nanowires of similar dimensions.