Solid polymer electrolytes based on starch as a polymer host and Magnesium Sulphate
(MgSO4) as an ionic dopant were successfully prepared by a single-solvent via solution casting
technique. As determined by XRD and FTIR analyses, the solid polymer electrolyte films
were in amorphous phase and the coexistence of peaks of the materials (starch and MgSO4)
confirming that the complex films were successfully obtained. The SEM observations showed
the films appeared to be rough and flat shape of surface. The highest ionic conductivity (σ)
of 8.52 ×10−5 S cm−1 was achieved at room temperature (303K) for the sample containing 35
wt.% MgSO4. The presented results revealed that the as-prepared solid polymer electrolyte
has the potential as dual functional compound in electrochemical storage application.
The new microelectronic products require the silicon (Si) wafer to be thinned to less than
150 µm in thickness. Residual defect on the wafer surface that leads to wafer breakage with
a rough surface still be produced by mechanical grinding. Thus, chemical etching method is
essentially applied to produce a reliable thin wafer with smooth surface of desired thickness.
In this work, we studied the wet chemical etching effect of different HNO3 concentrations on
total thickness and weight loss, etch rate, morphological and structural properties of Si wafer
in the mixtures of HNO3 and HF. The results showed that the total thickness and weight
loss increases with the increasing of HNO3 concentration and etching time. Higher HNO3
concentration causes higher etch rate, and the etch rate decreases at prolonged etching time.
A smoother and clearer homogeneous Si surface image was observed by optical microscope as
the etching time and HNO3 concentration increase. XRD analysis shows that the intensity
of etched Si wafer is higher than the pure one, which might indicate the smoother surface
formation after etching. The findings of present study can be valuably referred to produce
a reliable and desired Si thin wafer which is crucial in integrated circuit fabrication.