Displaying all 6 publications

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  1. Hamzah, I.H., Sidek, O., Abd Manaf, A.
    ASM Science Journal, 2010;4(2):142-148.
    MyJurnal
    A preliminary study was carried out to fabricate a three electrode system based on electrochemical sensoring. The cyclic voltammetry (CV) technique was chosen to select the type of metal suitable for evaporation and to compare the results produced from the fabricated gold electrode with the conventional macro-electrode system. The methodology and apparatus used involved low cost apparatus and methodology such as soft lithography, wet-etching, thermal evaporation, direct current sputtering, polymethylmethacrylate moulding and polydimethylsiloxane coating. The experiment was conducted at a fixed scan rate of 100 mV/s by using 0.01 M K3Fe(CN)6 in 0.1M KCl and well known method using Randles-Sevcik equation, peak current ratio and voltage separation was used to analyze the characterization on the fabricated sensors. Electrodes of 6.5 mm2 and 0.26 mm2 were fabricated to prove the adsorption effect of the reactant and the influence of the electrode area on the value of the peak current. CV analysis proved that the fabricated sensor was reliable for a range of 24 h at 25ºC room temperature.
  2. Yahya, A., Sidek, O., Salleh, M.F.M.
    ASM Science Journal, 2010;4(1):48-54.
    MyJurnal
    Frequency hopping spread spectrum (FHSS) systems with partial band interference require appropriate compounding of spread spectrum modulation, error correcting code, diversity and decoding method to receive improved transmission signal. In this paper, a fast FHSS system with regular low-density parity-check codes was employed to cater some anti-jamming competence by using good waterfall and error floor performance. The performance evalution of the previously mentioned system was conducted in the presence of partial band noise jamming. The best possible design of the system was achieved with the combination of diversity level L=2 with a probability rate of at 0.7 dB which showed the robustness of the system.
  3. Hashim Y, Sidek O
    J Nanosci Nanotechnol, 2012 Oct;12(10):7849-52.
    PMID: 23421147
    This paper presents the temperature characteristics of silicon nanowire transistors (SiNWTs) and examines the effect of temperature on transfer characteristics, threshold voltage, I(ON)/I(OFF) ratio, drain-induced barrier lowering (DIBL), and sub-threshold swing (SS). The (MuGFET) simulation tool was used to investigate the temperature characteristics of a transistor. The findings reveal the negative effect of higher working temperature on the use of SiNWTs in electronic circuits, such as digital circuits and amplifiers circuits, because of the lower I(ON)/I(OFF) ratio, higher DIBL, and higher SS at higher temperature. Moreover, the ON state is the optimum condition for using a transistor as a temperature nano-sensor.
  4. Hashim Y, Sidek O
    J Nanosci Nanotechnol, 2012 Sep;12(9):7101-4.
    PMID: 23035439
    This paper shows the effect of the dimensions of nanowires on threshold voltage, ON/OFF current ratio, and sub-threshold slope. These parameters are critical factors of the characteristics of silicon nanowire transistors. The MuGFET simulation tool was used to investigate the characteristics of a transistor. Current-voltage characteristics with different dimensions were simulated. Results show that long nanowires with low diameter and oxide thickness tend to have the best transistor characteristics.
  5. Hashim Y, Sidek O
    J Nanosci Nanotechnol, 2013 Jan;13(1):242-9.
    PMID: 23646723
    This study is the first to demonstrate dimensional optimization of nanowire-complementary metal-oxide-semiconductor inverter. Noise margins and inflection voltage of transfer characteristics are used as limiting factors in this optimization. Results indicate that optimization depends on both dimensions ratio and digital voltage level (Vdd). Diameter optimization reveals that when Vdd increases, the optimized value of (Dp/Dn) decreases. Channel length optimization results show that when Vdd increases, the optimized value of Ln decreases and that of (Lp/Ln) increases. Dimension ratio optimization reveals that when Vdd increases, the optimized value of Kp/Kn decreases, and silicon nanowire transistor with suitable dimensions (higher Dp and Ln with lower Lp and Dn) can be fabricated.
  6. Mubarak MH, Sidek O, Abdel-Rahman MR, Mustaffa MT, Mustapa Kamal AS, Mukras SM
    Sensors (Basel), 2018 Oct 31;18(11).
    PMID: 30384508 DOI: 10.3390/s18113714
    Since the 1940s, infrared (IR) detection and imaging at wavelengths in the two atmospheric windows of 3 to 5 and 8 to 14 μm has been extensively researched. Through several generations, these detectors have undergone considerable developments and have found use in various applications in different fields including military, space science, medicine and engineering. For the most recently proposed generation, these detectors are required to achieve high-speed detection with spectral and polarization selectivity while operating at room temperature. Antenna coupled IR detectors appear to be the most promising candidate to achieve these requirements and has received substantial attention from research in recent years. This paper sets out to present a review of the antenna coupled IR detector family, to explore the main concepts behind the detectors as well as outline their critical and challenging design considerations. In this context, the design of both elements, the antenna and the sensor, will be presented individually followed by the challenging techniques in the impedance matching between both elements. Some hands-on fabrication techniques will then be explored. Finally, a discussion on the coupled IR detector is presented with the aim of providing some useful insights into promising future work.
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