Atomic force microscopy (AFM) lithography was applied to produce nanoscale pattern for silicon nanowire transistor fabrication. This technique takes advantage of imaging facility of AFM and the ability of probe movement controlling over the sample surface to create nanopatterns. A conductive AFM tip was used to grow the silicon oxide nanopatterns on silicon on insulator (SOI) wafer. The applied tip-sample voltage and writing speed were well controlled in order to form pre-designed silicon oxide nanowire transistor structures. The effect of tetra methyl ammonium hydroxide (TMAH) etching duration on the oxide covered silicon nanowire transistor structure has been investigated. A completed silicon nanowire transistor was obtained by removing the oxide layer via hydrofluoric acid etching process. The fabricated silicon nanowire transistor consists of a silicon nanowire that acts as a channel with source and drain pads. A lateral gate pad with a nanowire head was fabricated very close to the channel in the formation of transistor structures.