Affiliations 

  • 1 Faculty of Engineering Technology, University Malaysia Pahang (UMP), Lebuhraya Tun Razak, 26300, Pahang, Malaysia
J Nanosci Nanotechnol, 2018 Feb 01;18(2):1199-1201.
PMID: 29448557 DOI: 10.1166/jnn.2018.13956

Abstract

This study explores optimization of resistance load (R-Load) of four silicon nanowire transistor (SiNWT)-based static random-access memory (SRAM) cell. Noise margins and inflection voltage of butterfly characteristics with static power consumption of SRAM cell are used as limiting factors in this optimization. Range of R-Load used in this study was 20-1000 KΩ with Vdd = 1 V. Results indicate that optimization depends critically on resistance load value. The optimized range of R-Load is 100-200 KΩ.

* Title and MeSH Headings from MEDLINE®/PubMed®, a database of the U.S. National Library of Medicine.