This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.
Many problems associated with the mixing process remain unsolved and result in poor mixing performance. The residence time distribution (RTD) and the mixing time are the most important parameters that determine the homogenisation that is achieved in the mixing vessel and are discussed in detail in this paper. In addition, this paper reviews the current problems associated with conventional tracers, mathematical models, and computational fluid dynamics simulations involved in radiotracer experiments and hybrid of radiotracer.
Carbon Nanotubes (CNTs) are generally nano-scale tubes comprising a network of carbon atoms in a cylindrical setting that compared with silicon counterparts present outstanding characteristics such as high mechanical strength, high sensing capability and large surface-to-volume ratio. These characteristics, in addition to the fact that CNTs experience changes in their electrical conductance when exposed to different gases, make them appropriate candidates for use in sensing/measuring applications such as gas detection devices. In this research, a model for a Field Effect Transistor (FET)-based structure has been developed as a platform for a gas detection sensor in which the CNT conductance change resulting from the chemical reaction between NH3 and CNT has been employed to model the sensing mechanism with proposed sensing parameters. The research implements the same FET-based structure as in the work of Peng et al. on nanotube-based NH3 gas detection. With respect to this conductance change, the I-V characteristic of the CNT is investigated. Finally, a comparative study shows satisfactory agreement between the proposed model and the experimental data from the mentioned research.
A Schottky diode has been designed and fabricated on an n-AlGaAs/GaAs high-electron-mobility-transistor (HEMT) structure. Current-voltage (I-V) measurements show good device rectification, with a Schottky barrier height of 0.4349 eV for Ni/Au metallization. The differences between the Schottky barrier height and the theoretical value (1.443 eV) are due to the fabrication process and smaller contact area. The RF signals up to 1 GHz are rectified well by the fabricated Schottky diode and a stable DC output voltage is obtained. The increment ratio of output voltage vs input power is 0.2 V/dBm for all tested frequencies, which is considered good enough for RF power detection. Power conversion efficiency up to 50% is obtained at frequency of 1 GHz and input power of 20 dBm with series connection between diode and load, which also shows the device's good potential as a rectenna device with further improvement. The fabricated n-AlGaAs/GaAs Schottky diode thus provides a conduit for breakthrough designs for RF power detectors, as well as ultra-low power on-chip rectenna device technology to be integrated in nanosystems.
The sensing responses in aqueous solution of an open-gated pH sensor fabricated on an AlGaN/GaN high-electron-mobility-transistor (HEMT) structure are investigated. Under air-exposed ambient conditions, the open-gated undoped AlGaN/GaN HEMT only shows the presence of a linear current region. This seems to show that very low Fermi level pinning by surface states exists in the undoped AlGaN/GaN sample. In aqueous solution, typical current-voltage (I-V) characteristics with reasonably good gate controllability are observed, showing that the potential of the AlGaN surface at the open-gated area is effectively controlled via aqueous solution by the Ag/AgCl gate electrode. The open-gated undoped AlGaN/GaN HEMT structure is capable of distinguishing pH level in aqueous electrolytes and exhibits linear sensitivity, where high sensitivity of 1.9 mA/pH or 3.88 mA/mm/pH at drain-source voltage, V(DS) = 5 V is obtained. Due to the large leakage current where it increases with the negative gate voltage, Nernstian like sensitivity cannot be determined as commonly reported in the literature. This large leakage current may be caused by the technical factors rather than any characteristics of the devices. Surprisingly, although there are some imperfections in the device preparation and measurement, the fabricated devices work very well in distinguishing the pH levels. Suppression of current leakage by improving the device preparation is likely needed to improve the device performance. The fabricated device is expected to be suitable for pH sensing applications.
In this study, porous silicon (PSi) was prepared and tested as an extended gate field-effect transistor (EGFET) for pH sensing. The prepared PSi has pore sizes in the range of 500 to 750 nm with a depth of approximately 42 µm. The results of testing PSi for hydrogen ion sensing in different pH buffer solutions reveal that the PSi has a sensitivity value of 66 mV/pH that is considered a super Nernstian value. The sensor considers stability to be in the pH range of 2 to 12. The hysteresis values of the prepared PSi sensor were approximately 8.2 and 10.5 mV in the low and high pH loop, respectively. The result of this study reveals a promising application of PSi in the field for detecting hydrogen ions in different solutions.
Nephrogenic diabetes insipidus (NDI), which can be congenital or acquired, results from the failure of the kidney to respond to the anti-diuretic hormone (ADH). This will lead to excessive water loss from the body in the form of urine. The kidney, therefore, has a crucial role in maintaining water balance and it is vital to restore this function in an artificial kidney. Herein, an ultrasensitive and highly selective aptameric graphene-based field-effect transistor (GFET) sensor for ADH detection was developed by directly immobilizing ADH-specific aptamer on a surface-modified suspended graphene channel. This direct immobilization of aptamer on the graphene surface is an attempt to mimic the functionality of collecting tube V 2 receptors in the ADH biosensor. This aptamer was then used as a probe to capture ADH peptide at the sensing area which leads to changes in the concentration of charge carriers in the graphene channel. The biosensor shows a significant increment in the relative change of current ratio from 5.76 to 22.60 with the increase of ADH concentration ranging from 10 ag/mL to 1 pg/mL. The ADH biosensor thus exhibits a sensitivity of 50.00 µA· ( g / mL ) - 1 with a limit of detection as low as 3.55 ag/mL. In specificity analysis, the ADH biosensor demonstrated a higher current value which is 338.64 µA for ADH-spiked in phosphate-buffered saline (PBS) and 557.89 µA for ADH-spiked in human serum in comparison with other biomolecules tested. This experimental evidence shows that the ADH biosensor is ultrasensitive and highly selective towards ADH in PBS buffer and ADH-spiked in human serum.
Aerospace equipages encounter potential radiation footprints through which soft errors occur in the memories onboard. Hence, robustness against radiation with reliability in memory cells is a crucial factor in aerospace electronic systems. This work proposes a novel Carbon nanotube field-effect transistor (CNTFET) in designing a robust memory cell to overcome these soft errors. Further, a petite driver circuit to test the SRAM cells which serve the purpose of precharge and sense amplifier, and has a reduction in threefold of transistor count is recommended. Additionally, analysis of robustness against radiation in varying memory cells is carried out using standard GPDK 90 nm, GPDK 45 nm, and 14 nm CNTFET. The reliability of memory cells depends on the critical charge of a device, and it is tested by striking an equivalent current charge of the cosmic ray's linear energy transfer (LET) level. Also, the robustness of the memory cell is tested against the variation in process, voltage and temperature. Though CNTFET surges with high power consumption, it exhibits better noise margin and depleted access time. GPDK 45 nm has an average of 40% increase in SNM and 93% reduction of power compared to the 14 nm CNTFET with 96% of surge in write access time. Thus, the conventional MOSFET's 45 nm node outperforms all the configurations in terms of static noise margin, power, and read delay which swaps with increased write access time.
Conventional lateral and vertical n-channel MOS transistors with channel length in the range of 100nm to 50nm have been systematically investigated by means of device simulation. The comparison analysis includes critical parameters that govern device performance. Threshold voltage VT roll-off, leakage current Ioff, drain saturation current IDsat and sub-threshold swing S were analyze and compared between the device. Due to double gate (DG) structure over the side of silicon pillar a better electrostatics potential control of channel is obtained in vertical device shown by an analysis on VT roll-off. A two decade higher of Ioff in planar device is observed with Lg=50nm. A factor of three times larger IDsat is observed for vertical MOSFETs compared to planar device. The sub-threshold swing S remains almost the same when the Lg larger than 80 nm. It increased rapidly when the Lg is scaled down to 50 nm due to the short channel effect SCE. However, the vertical device has a steady increase whereas the planar device has suffered immediate enhance of SCE. The analysis results confirmed that vertical MOSFET with double-gate structure is a potential solution to overcome SCE when scaled the channel length to 50nm and beyond.
Quantum dots being an interesting class of nanostructures are considered potential prototype systems for novel nano-devices such as single electron transistor (sET). Here in this research, we present an analysis of the electron trajectory in the vicinity of gallium arsenide (GaAs) quantum dot. To perform this study, DFT based methodology is employed to optimize structure of quantum dot and determining the electrostatic potential around the dot. Under the influence of obtained electrostatic potential, trajectory of the moving electron towards the dot is investigated. The results showed that GaAs quantum dot have negative and positive potential surfaces that influence the electron interaction with the dot. These results motivate the development of SET electrode channel where the electron moves towards the dot on the surface with positive potential rather than negative potential surface.
The potential of organic semiconductor based devices for light generation is demonstrated by the commercialisation of display technologies using organic light emitting diode (OLED). In OLED, organic materials plays an important role of emitting light once the current is passed through. However OLED have drawbacks whereby it suffers from photon loss and exciton quenching. Organic light emitting transistor (OLET) emerged as a new technology to compensate the efficiency and brightness loss encountered in OLED. The structure has combinational capability to switch the electronic signal such as the field effect transistor (FET) as well as to generate light. Different colours of light could be generated by using different types of organic material. The light emission could also be tuned and scanned in OLET. The studies carried out in this paper focuses on investigation of fabricated MEH-PPV based OLED and also OLET via current voltage characteristics. These studies will continue with a view to develop an optimised MEH-PPV based OLET.
The cross-coupled circuit mechanism based dynamic latch comparator is presented in this research. The comparator is designed using differential input stages with regenerative S-R latch to achieve lower offset, lower power, higher speed and higher resolution. In order to decrease circuit complexity, a comparator should maintain power, speed, resolution and offset-voltage properly. Simulations show that this novel dynamic latch comparator designed in 0.18 µm CMOS technology achieves 3.44 mV resolution with 8 bit precision at a frequency of 50 MHz while dissipating 158.5 µW from 1.8 V supply and 88.05 µA average current. Moreover, the proposed design propagates as fast as 4.2 nS with energy efficiency of 0.7 fJ/conversion-step. Additionally, the core circuit layout only occupies 0.008 mm2.
This paper examines the impact of two important geometrical parameters, namely the thickness and source/drain extensions on the performance of low doped p-type double lateral gate junctionless transistors (DGJLTs). The three dimensional Technology Computer-Aided Design simulation is implemented to calculate the characteristics of the devices with different thickness and source/drain extension and based on that, the parameters such as threshold voltage, transconductance and resistance in saturation region are analyzed. In addition, simulation results provide a physical explanation for the variation of device characteristics given by the variation of geometric parameters, mainly based on investigation of the electric field components and the carries density variation. It is shown that, the variation of the carrier density is the main factor which affects the characteristics of the device when the device's thickness is varied. However, the electric field is mainly responsible for variation of the characteristics when the source/drain extension is changed.
A high-voltage generator (HVG) is an essential part of a radio frequency identification electrically erasable programmable read-only memory (RFID-EEPROM). An HVG circuit is used to generate a regulated output voltage that is higher than the power supply voltage. However, the performance of the HVG is affected owing to the high-power dissipation, high-ripple voltage and low-pumping efficiency. Therefore, a regulator circuit consists of a voltage divider, comparator and a voltage reference, which are respectively required to reduce the ripple voltage, increase pumping efficiency and decrease the power dissipation of the HVG. Conversely, a clock driving circuit consists of the current-starved ring oscillator (CSRO), and the non- overlapping clock generator is required to drive the clock signals of the HVG circuit. In this study, the Mentor Graphics EldoSpice software package is used to design and simulate the HVG circuitry. The results showed that the designed CSRO dissipated only 4.9 μW at 10.2 MHz and that the phase noise was only -119.38 dBc/Hz at 1 MHz. Moreover, the proposed charge pump circuit was able to generate a maximum VPP of 13.53 V and it dissipated a power of only 31.01 μW for an input voltage VDD of 1.8 V. After integrating all the HVG modules, the results showed that the regulated HVG circuit was also able to generate a higher VPP of 14.59 V, while the total power dissipated was only 0.12 mW with a chip area of 0.044 mm2. Moreover, the HVG circuit produced a pumping efficiency of 90% and reduced the ripple voltage to <4 mV. Therefore, the integration of all the proposed modules in HVG ensured low-ripple programming voltages, higher pumping efficiency, and EEPROMs with lower power dissipation, and can be extensively used in low-power applications, such as in non-volatile memory, radiofrequency identification transponders, on-chip direct current DC-DC converters.
Silicene has attracted remarkable attention in the semiconductor research community due to its silicon (Si) nature. It is predicted as one of the most promising candidates for the next generation nanoelectronic devices. In this paper, an efficient non-iterative technique is employed to create the SPICE models for p-type and n-type uniformly doped silicene field-effect transistors (FETs). The current-voltage characteristics show that the proposed silicene FET models exhibit high on-to-off current ratio under ballistic transport. In order to obtain practical digital logic timing diagrams, a parasitic load capacitance, which is dependent on the interconnect length, is attached at the output terminal of the logic circuits. Furthermore, the key circuit performance metrics, including the propagation delay, average power, power-delay product and energy-delay product of the proposed silicene-based logic gates are extracted and benchmarked with published results. The effects of the interconnect length to the propagation delay and average power are also investigated. The results of this work further envisage the uniformly doped silicene as a promising candidate for future nanoelectronic applications.
Moore's Law is approaching its end as transistors are scaled down to tens or few atoms per device, researchers are actively seeking for alternative approaches to leverage more-than-Moore nanoelectronics. Substituting the channel material of a field-effect transistors (FET) with silicene is foreseen as a viable approach for future transistor applications. In this study, we proposed a SPICE-compatible model for p-type (Aluminium) uniformly doped silicene FET for digital switching applications. The performance of the proposed device is benchmarked with various low-dimensional FETs in terms of their on-to-off current ratio, subthreshold swing and drain-induced barrier lowering. The results show that the proposed p-type silicene FET is comparable to most of the selected low-dimensional FET models. With its decent performance, the proposed SPICE-compatible model should be extended to the circuit-level simulation and beyond in future work.
The junctionless nanowire transistor is a promising alternative for a new generation of nanotransistors. In this letter the atomic force microscopy nanolithography with two wet etching processes was implemented to fabricate simple structures as double gate and single gate junctionless silicon nanowire transistor on low doped p-type silicon-on-insulator wafer. The etching process was developed and optimized in the present work compared to our previous works. The output, transfer characteristics and drain conductance of both structures were compared. The trend for both devices found to be the same but differences in subthreshold swing, 'on/off' ratio, and threshold voltage were observed. The devices are 'on' state when performing as the pinch off devices. The positive gate voltage shows pinch off effect, while the negative gate voltage was unable to make a significant effect on drain current. The charge transmission in devices is also investigated in simple model according to a junctionless transistor principal.
Nanofabricated gold nanoparticles (Au-NPs) on MoS2 nanosheets (Au-NPs/MoS2) in back-gated field-effect transistor (BG-FET) are presented, which acts as an efficient semiconductor device for detecting a low concentration of C-reactive protein (C-RP). The decorated nanomaterials lead to an enhanced electron conduction layer on a 100-μm-sized transducing channel. The sensing surface was characterized by Raman spectroscopy, ultraviolet-visible spectroscopy (UV-Vis), atomic force microscopy (AFM), scanning electron microscopy (SEM), and high-power microscopy (HPM). The BG-FET device exhibits an excellent limit of detection of 8.38 fg/mL and a sensitivity of 176 nA/g·mL-1. The current study with Au-NPs/MoS2 BG-FET displays a new potential biosensing technology; especially for integration into complementary metal oxide (CMOS) technology for hand-held future device application.
The development of electrical biosensor towards device miniaturization in order to achieve better sensitivity with enhanced electrical signal has certain limitations especially complexity in fabrication process and costs. In this paper, an alternative technique with minor modification in the device structure is presented for signal amplification by implementing ambipolar conduction in the biosensor itself. We demonstrated the field-effect transistor (FET)-based biosensor coupled back-gate for attaining a higher sensitivity with the detection of lower target abundance. To utilize the coupled back-gate as a pre-amplifier, silicon-on-insulator wafer with thicknesses of top-silicon and buried oxide (BOX) layers of 70 nm and 145 nm, respectively were desired. Titanium dioxide (TiO2) nanomaterial was deposited using sol-gel method on the channel which acts as a transducer. Surface functionalization on TiO2 thin film allowed an effective immobilization of anti-cardiac troponin I antibody to interact cardiac troponin I (cTnI). Binding events at each step was validated by X-ray photoelectron spectroscopy (XPS) analysis. Further, electrical characterization (Id-Vd) confirms the potentiality of FET-based biosensor to detect cTnI (represents acute myocardial infarction disease) with the concentration ranges from 10 μg/ml down to 1 fg/ml. The sensitivity of 459.2 nA (g/ml)-1 and lower detection limit of 1 fg/ml were achieved at Vbg = -5 V and Vd = 5 V. The designed device demonstrates its ability to detect lower level of cTnI with pre-amplified electrical signal by back-gate biasing.
This paper shows the effect of the dimensions of nanowires on threshold voltage, ON/OFF current ratio, and sub-threshold slope. These parameters are critical factors of the characteristics of silicon nanowire transistors. The MuGFET simulation tool was used to investigate the characteristics of a transistor. Current-voltage characteristics with different dimensions were simulated. Results show that long nanowires with low diameter and oxide thickness tend to have the best transistor characteristics.